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platforms/zcu104/ddram: add PRE_EMPHASIS/EQUALIZATION settings

This commit is contained in:
Florent Kermarrec 2020-02-27 10:43:01 +01:00
parent d87b8b3c66
commit 58f588f69e
1 changed files with 18 additions and 6 deletions
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24
litex_boards/platforms/zcu104.py
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@ -64,11 +64,17 @@ _io = [
"AG8 AF8 AG10 AG11 AH13 AG13 AJ11 AH11", "AG8 AF8 AG10 AG11 AH13 AG13 AJ11 AH11",
"AK9 AJ9 AK10 AJ10 AL12 AK12 AL10 AL11", "AK9 AJ9 AK10 AJ10 AL12 AK12 AL10 AL11",
"AM8 AM9 AM10 AM11 AP11 AN11 AP9 AP10"), "AM8 AM9 AM10 AM11 AP11 AN11 AP9 AP10"),
IOStandard("POD12_DCI")), IOStandard("POD12_DCI"),
Misc("PRE_EMPHASIS=RDRV_240"),
Misc("EQUALIZATION=EQ_LEVEL2")),
Subsignal("dqs_p", Pins("AC12 AG9 AK8 AN9"), Subsignal("dqs_p", Pins("AC12 AG9 AK8 AN9"),
IOStandard("DIFF_POD12_DCI")), IOStandard("DIFF_POD12_DCI"),
Misc("PRE_EMPHASIS=RDRV_240"),
Misc("EQUALIZATION=EQ_LEVEL2")),
Subsignal("dqs_n", Pins("AD12 AH9 AL8 AN8"), Subsignal("dqs_n", Pins("AD12 AH9 AL8 AN8"),
IOStandard("DIFF_POD12_DCI")), IOStandard("DIFF_POD12_DCI"),
Misc("PRE_EMPHASIS=RDRV_240"),
Misc("EQUALIZATION=EQ_LEVEL2")),
Subsignal("clk_p", Pins("AF18"), IOStandard("DIFF_SSTL12_DCI")), # also AJ16 for larger SODIMMs Subsignal("clk_p", Pins("AF18"), IOStandard("DIFF_SSTL12_DCI")), # also AJ16 for larger SODIMMs
Subsignal("clk_n", Pins("AG18"), IOStandard("DIFF_SSTL12_DCI")), # also AJ15 for larger SODIMMs Subsignal("clk_n", Pins("AG18"), IOStandard("DIFF_SSTL12_DCI")), # also AJ15 for larger SODIMMs
Subsignal("cke", Pins("AD17"), IOStandard("SSTL12_DCI")), # also AM15 for larger SODIMMs Subsignal("cke", Pins("AD17"), IOStandard("SSTL12_DCI")), # also AM15 for larger SODIMMs
@ -102,11 +108,17 @@ _io = [
"AG8 AF8 AG10 AG11 AH13 AG13 AJ11 AH11", "AG8 AF8 AG10 AG11 AH13 AG13 AJ11 AH11",
"AK9 AJ9 AK10 AJ10 AL12 AK12 AL10 AL11", "AK9 AJ9 AK10 AJ10 AL12 AK12 AL10 AL11",
"AM8 AM9 AM10 AM11 AP11 AN11 AP9 AP10"), "AM8 AM9 AM10 AM11 AP11 AN11 AP9 AP10"),
IOStandard("POD12_DCI")), IOStandard("POD12_DCI"),
Misc("PRE_EMPHASIS=RDRV_240"),
Misc("EQUALIZATION=EQ_LEVEL2")),
Subsignal("dqs_p", Pins("AF23 AA18 AK22 AM21 AC12 AG9 AK8 AN9"), Subsignal("dqs_p", Pins("AF23 AA18 AK22 AM21 AC12 AG9 AK8 AN9"),
IOStandard("DIFF_POD12_DCI")), IOStandard("DIFF_POD12_DCI"),
Misc("PRE_EMPHASIS=RDRV_240"),
Misc("EQUALIZATION=EQ_LEVEL2")),
Subsignal("dqs_n", Pins("AG23 AB18 AK23 AN21 AD12 AH9 AL8 AN8"), Subsignal("dqs_n", Pins("AG23 AB18 AK23 AN21 AD12 AH9 AL8 AN8"),
IOStandard("DIFF_POD12_DCI")), IOStandard("DIFF_POD12_DCI"),
Misc("PRE_EMPHASIS=RDRV_240"),
Misc("EQUALIZATION=EQ_LEVEL2")),
Subsignal("clk_p", Pins("AF18"), IOStandard("DIFF_SSTL12_DCI")), # also AJ16 for larger SODIMMs Subsignal("clk_p", Pins("AF18"), IOStandard("DIFF_SSTL12_DCI")), # also AJ16 for larger SODIMMs
Subsignal("clk_n", Pins("AG18"), IOStandard("DIFF_SSTL12_DCI")), # also AJ15 for larger SODIMMs Subsignal("clk_n", Pins("AG18"), IOStandard("DIFF_SSTL12_DCI")), # also AJ15 for larger SODIMMs
Subsignal("cke", Pins("AD17"), IOStandard("SSTL12_DCI")), # also AM15 for larger SODIMMs Subsignal("cke", Pins("AD17"), IOStandard("SSTL12_DCI")), # also AM15 for larger SODIMMs