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platforms/sipeed_tang_primer_25k: swap UART TX & RX, fix TX pin (J1:20 -> J1:21)

This commit is contained in:
Gwenhael Goavec-Merou 2023-10-19 06:26:10 +02:00
parent a4fc45bba6
commit 5f694166ce
1 changed files with 2 additions and 2 deletions
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litex_boards/platforms/sipeed_tang_primer_25k.py
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@ -75,8 +75,8 @@ _connectors = [
_dock_io = [ _dock_io = [
# Serial. # Serial.
("serial", 0, ("serial", 0,
Subsignal("rx", Pins("J1:20")), Subsignal("rx", Pins("J1:19")),
Subsignal("tx", Pins("J1:19")), Subsignal("tx", Pins("J1:21")),
IOStandard("LVCMOS33") IOStandard("LVCMOS33")
), ),