platforms/fpc_iii: review/cleanup to increase similarities with others platforms and ease maintenance.
This commit is contained in:
Florent Kermarrec
parent
4eb5533040
commit
6c6d8a1393
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@ -17,37 +17,32 @@ _io = [
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("clk25", 0, Pins("P3"), IOStandard("LVCMOS33")),
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# LEDs
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("user_led", 0, Pins("N16"), IOStandard("LVCMOS15"), Misc( "OPENDRAIN=ON" ) ),
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("user_led", 1, Pins("P20"), IOStandard("LVCMOS15"), Misc( "OPENDRAIN=ON" ) ),
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("user_led", 2, Pins("R20"), IOStandard("LVCMOS15"), Misc( "OPENDRAIN=ON" ) ),
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("user_led", 3, Pins("N20"), IOStandard("LVCMOS15"), Misc( "OPENDRAIN=ON" ) ),
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("user_led", 4, Pins("U20"), IOStandard("LVCMOS15"), Misc( "OPENDRAIN=ON" ) ),
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("user_led", 5, Pins("M20"), IOStandard("LVCMOS15"), Misc( "OPENDRAIN=ON" ) ),
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("user_led", 6, Pins("T20"), IOStandard("LVCMOS15"), Misc( "OPENDRAIN=ON" ) ),
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("user_led", 7, Pins("D6"), IOStandard("LVCMOS33"), Misc( "OPENDRAIN=ON" ) ),
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# Serial
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#("serial", 0,
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# Subsignal("rx", Pins("N2"), IOStandard("LVCMOS33")),
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# Subsignal("tx", Pins("M1"), IOStandard("LVCMOS33"))),
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("user_led", 0, Pins("N16"), IOStandard("LVCMOS15"), Misc("OPENDRAIN=ON")),
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("user_led", 1, Pins("P20"), IOStandard("LVCMOS15"), Misc("OPENDRAIN=ON")),
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("user_led", 2, Pins("R20"), IOStandard("LVCMOS15"), Misc("OPENDRAIN=ON")),
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("user_led", 3, Pins("N20"), IOStandard("LVCMOS15"), Misc("OPENDRAIN=ON")),
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("user_led", 4, Pins("U20"), IOStandard("LVCMOS15"), Misc("OPENDRAIN=ON")),
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("user_led", 5, Pins("M20"), IOStandard("LVCMOS15"), Misc("OPENDRAIN=ON")),
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("user_led", 6, Pins("T20"), IOStandard("LVCMOS15"), Misc("OPENDRAIN=ON")),
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("user_led", 7, Pins("D6"), IOStandard("LVCMOS33"), Misc("OPENDRAIN=ON")),
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# USB FIFO
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("usb_fifo", 0,
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Subsignal( "data", Pins( "N2 M1 M3 L1 L2 K1 K2 J1" ) ),
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Subsignal( "rxf_n", Pins( "H1" ) ),
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Subsignal( "txe_n", Pins( "H2" ) ),
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Subsignal( "rd_n", Pins( "G1" ) ),
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Subsignal( "wr_n", Pins( "G2" ) ),
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Subsignal( "siwua", Pins( "F1" ) )
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Subsignal( "data", Pins("N2 M1 M3 L1 L2 K1 K2 J1")),
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Subsignal( "rxf_n", Pins("H1")),
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Subsignal( "txe_n", Pins("H2")),
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Subsignal( "rd_n", Pins("G1")),
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Subsignal( "wr_n", Pins("G2")),
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Subsignal( "siwua", Pins("F1"))
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),
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# SPIFlash
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("spiflash", 0,
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Subsignal("cs_n", Pins("R2"), IOStandard("LVCMOS33")),
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Subsignal("mosi", Pins("W2"), IOStandard("LVCMOS33")),
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Subsignal("miso", Pins("V2"), IOStandard("LVCMOS33")),
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Subsignal("wp", Pins("Y2"), IOStandard("LVCMOS33")),
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Subsignal("hold", Pins("W1"), IOStandard("LVCMOS33")),
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Subsignal("mosi", Pins("W2"), IOStandard("LVCMOS33")),
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Subsignal("miso", Pins("V2"), IOStandard("LVCMOS33")),
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Subsignal("wp", Pins("Y2"), IOStandard("LVCMOS33")),
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Subsignal("hold", Pins("W1"), IOStandard("LVCMOS33")),
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),
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("spiflash4x", 0,
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Subsignal("cs_n", Pins("R2"), IOStandard("LVCMOS33")),
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@ -83,32 +78,36 @@ _io = [
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),
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# DDR3 SDRAM
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("dram_vtt_en", 0, Pins( "M19" ), IOStandard( "LVCMOS15" ), Misc( "OPENDRAIN=ON" ) ),
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("dram_vtt_en", 0, Pins("M19"), IOStandard("LVCMOS15"), Misc("OPENDRAIN=ON")),
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("ddram", 0,
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Subsignal( "a", Pins( "E18 H16 D18 L16 H17 E17 G18 C18 "
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"G16 D17 J16 F18 J17 F16 F17" ),
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IOStandard( "SSTL15_I" ) ),
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Subsignal( "ba", Pins( "M18 H18 L17" ), IOStandard( "SSTL15_I" ) ),
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Subsignal( "ras_n", Pins( "R17" ), IOStandard( "SSTL15_I" ) ),
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Subsignal( "cas_n", Pins( "R16" ), IOStandard( "SSTL15_I" ) ),
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Subsignal( "we_n", Pins( "M17" ), IOStandard( "SSTL15_I" ) ),
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Subsignal( "cs_n", Pins( "P17" ), IOStandard( "SSTL15_I" ) ),
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Subsignal( "dm", Pins( "F20 T18" ), IOStandard( "SSTL15_I" ) ),
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Subsignal( "dq", Pins( "J20 F19 J19 E19 K19 E20 K20 G20 ",
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"T17 U16 P18 U17 N19 U18 P19 U19" ),
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IOStandard( "SSTL15_I" ), Misc( "TERMINATION=50" ) ),
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Subsignal( "dqs_p", Pins( "G19 T19" ), IOStandard( "SSTL15D_I" ),
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Misc( "TERMINATION=OFF" ), Misc( "DIFFRESISTOR=100" ) ),
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Subsignal( "clk_p", Pins( "K16" ), IOStandard( "SSTL15D_I" ) ),
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Subsignal( "cke", Pins( "D19" ), IOStandard( "SSTL15_I" ) ),
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Subsignal( "odt", Pins( "H4" ) ), # FIXME not connected
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Subsignal( "reset_n", Pins( "L20" ), IOStandard( "SSTL15_I" ) ),
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# Pseudo-VCCIO pads: SSTL15_II for 10 mA drive strength, see
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# FPGA-TN-02035, section 6.7.
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Subsignal("a", Pins(
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"E18 H16 D18 L16 H17 E17 G18 C18 "
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"G16 D17 J16 F18 J17 F16 F17"
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),
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IOStandard("SSTL15_I")),
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Subsignal("ba", Pins("M18 H18 L17"), IOStandard("SSTL15_I")),
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Subsignal("ras_n", Pins("R17"), IOStandard("SSTL15_I")),
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Subsignal("cas_n", Pins("R16"), IOStandard("SSTL15_I")),
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Subsignal("we_n", Pins("M17"), IOStandard("SSTL15_I")),
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Subsignal("cs_n", Pins("P17"), IOStandard("SSTL15_I")),
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Subsignal("dm", Pins("F20 T18"), IOStandard("SSTL15_I")),
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Subsignal("dq", Pins(
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"J20 F19 J19 E19 K19 E20 K20 G20",
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"T17 U16 P18 U17 N19 U18 P19 U19"),
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IOStandard("SSTL15_I"),
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Misc("TERMINATION=50")),
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Subsignal("dqs_p", Pins("G19 T19"), IOStandard("SSTL15D_I"),
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Misc("TERMINATION=OFF"),
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Misc("DIFFRESISTOR=100")),
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Subsignal("clk_p" , Pins("K16"), IOStandard("SSTL15D_I")),
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Subsignal("cke", Pins("D19"), IOStandard("SSTL15_I")),
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Subsignal("odt", Pins("H4")), # FIXME not connected
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Subsignal("reset_n", Pins("L20"), IOStandard("SSTL15_I")),
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# Pseudo-VCCIO pads: SSTL15_II for 10 mA drive strength, see FPGA-TN-02035, section 6.7.
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Subsignal( "vccio", Pins( "C20 E16 J18 K18 L18 L19 N17 N18 T16" ),
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IOStandard( "SSTL15_II" ) ),
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Misc( "SLEWRATE=FAST" ) ),
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IOStandard( "SSTL15_II" ) ),
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Misc("SLEWRATE=FAST")),
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# MII Ethernet
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("eth_clocks", 0,
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Subsignal("rx", Pins("L5")),
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@ -130,23 +129,23 @@ _io = [
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# HDMI output
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("hdmi", 0,
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Subsignal( "data0", Pins( "G3" ) ),
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Subsignal( "data1", Pins( "F4" ) ),
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Subsignal( "data2", Pins( "C1" ) ),
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Subsignal( "clk", Pins( "E4" ) ),
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IOStandard( "LVCMOS33D" ), Misc( "DRIVE=8 SLEWRATE=FAST" ) ),
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Subsignal("data0", Pins("G3")),
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Subsignal("data1", Pins("F4")),
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Subsignal("data2", Pins("C1")),
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Subsignal("clk", Pins("E4") ),
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IOStandard("LVCMOS33D"),
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Misc("DRIVE=8 SLEWRATE=FAST")),
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# USB host 1
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("usbhost", 0,
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Subsignal( "dp", Pins( "B6" ) ),
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Subsignal( "dn", Pins( "A6" ) ),
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IOStandard( "LVCMOS33" ) )
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Subsignal("dp", Pins("B6")),
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Subsignal("dn", Pins("A6")),
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IOStandard("LVCMOS33"))
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]
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# Connectors ---------------------------------------------------------------------------------------
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_connectors = [
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]
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_connectors = []
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# Platform -----------------------------------------------------------------------------------------
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