trenz_tec0117: Avoid forcing CPU type (only force to lite variant when VexRiscv is selected=default).

2021-07-13 19:39:27 +02:00 · 2021-07-13 19:39:27 +02:00 · 6e31d12fa9
parent 8c1e6c6a02
commit 6e31d12fa9
1 changed files with 2 additions and 2 deletions
--- a/litex_boards/targets/trenz_tec0117.py
+++ b/litex_boards/targets/trenz_tec0117.py
@ -59,8 +59,8 @@ class BaseSoC(SoCCore):
        # Use custom default configuration to fit in LittleBee.
        kwargs["integrated_sram_size"] = 0x1000
        kwargs["integrated_rom_size"]  = 0x6000
-        kwargs["cpu_type"]     = "vexriscv"
-        kwargs["cpu_variant"]  = "lite"
+        if kwargs.get("cpu_type", "vexriscv") == "vexriscv":
+            kwargs["cpu_variant"]  = "lite"

        # Set CPU variant / reset address
        kwargs["cpu_reset_address"] = self.mem_map["spiflash"] + bios_flash_offset