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arty: add option to use litespi QSPI controller 

Signed-off-by: Karol Gugala <kgugala@antmicro.com>
This commit is contained in:
Karol Gugala 2021-04-25 20:42:02 +02:00
parent 228a9650d4
commit 84ae2b2bbc
1 changed files with 19 additions and 1 deletions
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20
litex_boards/targets/digilent_arty.py
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@ -16,6 +16,7 @@ from litex_boards.platforms import arty
from litex.build.xilinx.vivado import vivado_build_args, vivado_build_argdict
from litex.soc.cores.clock import *
from litex.soc.integration.soc import SoCRegion
from litex.soc.integration.soc_core import *
from litex.soc.integration.builder import *
from litex.soc.cores.led import LedChaser
@ -25,6 +26,11 @@ from litedram.phy import s7ddrphy
from liteeth.phy.mii import LiteEthPHYMII
from litespi.modules import S25FL128S
from litespi.opcodes import SpiNorFlashOpCodes as Codes
from litespi.phy.generic import LiteSPIPHY
from litespi import LiteSPI
# CRG ----------------------------------------------------------------------------------------------
class _CRG(Module):
@ -55,7 +61,7 @@ class _CRG(Module):
# BaseSoC ------------------------------------------------------------------------------------------
class BaseSoC(SoCCore):
def __init__(self, variant="a7-35", toolchain="vivado", sys_clk_freq=int(100e6), with_ethernet=False, with_etherbone=False, eth_ip="192.168.1.50", eth_dynamic_ip=False, ident_version=True, with_jtagbone=True, **kwargs):
def __init__(self, variant="a7-35", toolchain="vivado", sys_clk_freq=int(100e6), with_ethernet=False, with_etherbone=False, eth_ip="192.168.1.50", eth_dynamic_ip=False, ident_version=True, with_jtagbone=True, with_mapped_flash=False, **kwargs):
platform = arty.Platform(variant=variant, toolchain=toolchain)
# SoCCore ----------------------------------------------------------------------------------
@ -93,6 +99,16 @@ class BaseSoC(SoCCore):
if with_jtagbone:
self.add_jtagbone()
if with_mapped_flash:
self.submodules.spiflash_phy = LiteSPIPHY(platform.request("spiflash"), S25FL128S(Codes.READ_1_1_1))
self.submodules.spiflash_mmap = LiteSPI(phy=self.spiflash_phy,
clk_freq = sys_clk_freq,
mmap_endianness = self.cpu.endianness)
spiflash_size = 1024*1024*16
spiflash_region = SoCRegion(origin=self.mem_map.get("spiflash", None), size=spiflash_size, cached=False)
self.bus.add_slave(name="spiflash", slave=self.spiflash_mmap.bus, region=spiflash_region)
# Leds -------------------------------------------------------------------------------------
self.submodules.leds = LedChaser(
pads = platform.request_all("user_led"),
@ -118,6 +134,7 @@ def main():
parser.add_argument("--sdcard-adapter", type=str, help="SDCard PMOD adapter: digilent (default) or numato")
parser.add_argument("--no-ident-version", action="store_false", help="Disable build time output")
parser.add_argument("--with-jtagbone", action="store_true", help="Enable Jtagbone support")
parser.add_argument("--with-mapped-flash", action="store_true", help="Enable memory mapped flash")
builder_args(parser)
soc_core_args(parser)
vivado_build_args(parser)
@ -135,6 +152,7 @@ def main():
eth_dynamic_ip = args.eth_dynamic_ip,
ident_version = args.no_ident_version,
with_jtagbone = args.with_jtagbone,
with_mapped_flash = args.with_mapped_flash,
**soc_core_argdict(args)
)
if args.sdcard_adapter == "numato":