trenz_tec0117: Add SDCard (SPI and SD mode), move SPI Flash to 0x00000000 and use default l2_cache_min_data_width.
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@ -75,9 +75,33 @@ _io = [
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# Connectors ---------------------------------------------------------------------------------------
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_connectors = [
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("PMOD", "47 41 38 40 - - 36 42 39 37"),
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("pmod", "47 41 38 40 36 42 39 37"),
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]
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# PMODs --------------------------------------------------------------------------------------------
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def sdcard_pmod_io(pmod):
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return [
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# SDCard PMOD:
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# - https://store.digilentinc.com/pmod-microsd-microsd-card-slot/
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# - https://github.com/antmicro/arty-expansion-board
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("spisdcard", 0,
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Subsignal("clk", Pins(f"{pmod}:3")),
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Subsignal("mosi", Pins(f"{pmod}:1"), Misc("PULL_MODE=UP")),
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Subsignal("cs_n", Pins(f"{pmod}:0"), Misc("PULL_MODE=UP")),
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Subsignal("miso", Pins(f"{pmod}:2"), Misc("PULL_MODE=UP")),
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IOStandard("LVCMOS33"),
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),
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("sdcard", 0,
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Subsignal("data", Pins(f"{pmod}:2 {pmod}:4 {pmod}:5 {pmod}:0"), Misc("PULL_MODE=UP")),
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Subsignal("cmd", Pins(f"{pmod}:1"), Misc("PULL_MODE=UP")),
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Subsignal("clk", Pins(f"{pmod}:3")),
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Subsignal("cd", Pins(f"{pmod}:6")),
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IOStandard("LVCMOS33"),
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),
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]
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_sdcard_pmod_io = sdcard_pmod_io("pmod")
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# Platform -----------------------------------------------------------------------------------------
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class Platform(GowinPlatform):
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@ -85,7 +109,7 @@ class Platform(GowinPlatform):
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default_clk_period = 1e9/12e6
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def __init__(self):
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GowinPlatform.__init__(self, "GW1NR-LV9QN88C6/I5", _io, toolchain="gowin", devicename='GW1NR-9')
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GowinPlatform.__init__(self, "GW1NR-LV9QN88C6/I5", _io, _connectors, toolchain="gowin", devicename='GW1NR-9')
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def create_programmer(self):
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return OpenFPGALoader("littlebee")
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@ -60,8 +60,8 @@ class _CRG(Module):
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# BaseSoC ------------------------------------------------------------------------------------------
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class BaseSoC(SoCCore):
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mem_map = {**SoCCore.mem_map, **{"spiflash": 0x80000000}}
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def __init__(self, bios_flash_offset, sys_clk_freq=int(25e6), sdram_rate="1:1",
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mem_map = {**SoCCore.mem_map, **{"spiflash": 0x00000000}}
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def __init__(self, bios_flash_offset=0x0000, sys_clk_freq=int(25e6), sdram_rate="1:1",
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with_led_chaser=True, **kwargs):
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platform = tec0117.Platform()
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@ -84,7 +84,7 @@ class BaseSoC(SoCCore):
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# Add ROM linker region --------------------------------------------------------------------
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self.bus.add_region("rom", SoCRegion(
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origin = self.mem_map["spiflash"] + bios_flash_offset,
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size = 32*kB,
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size = 64*kB,
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linker = True)
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)
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@ -110,10 +110,9 @@ class BaseSoC(SoCCore):
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sdrphy_cls = HalfRateGENSDRPHY if sdram_rate == "1:2" else GENSDRPHY
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self.submodules.sdrphy = sdrphy_cls(sdram_pads, sys_clk_freq)
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self.add_sdram("sdram",
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phy = self.sdrphy,
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module = MT48LC4M16(sys_clk_freq, sdram_rate), # FIXME.
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l2_cache_size = 128,
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l2_cache_min_data_width = 256,
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phy = self.sdrphy,
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module = MT48LC4M16(sys_clk_freq, sdram_rate), # FIXME.
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l2_cache_size = 128,
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)
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# Leds -------------------------------------------------------------------------------------
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@ -162,6 +161,9 @@ def main():
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parser.add_argument("--bios-flash-offset", default=0x0000, help="BIOS offset in SPI Flash (0x00000 default)")
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parser.add_argument("--flash", action="store_true", help="Flash Bitstream and BIOS")
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parser.add_argument("--sys-clk-freq", default=25e6, help="System clock frequency (default: 25MHz)")
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sdopts = parser.add_mutually_exclusive_group()
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sdopts.add_argument("--with-spi-sdcard", action="store_true", help="Enable SPI-mode SDCard support")
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sdopts.add_argument("--with-sdcard", action="store_true", help="Enable SDCard support")
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builder_args(parser)
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soc_core_args(parser)
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args = parser.parse_args()
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@ -171,7 +173,13 @@ def main():
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sys_clk_freq = int(float(args.sys_clk_freq)),
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**soc_core_argdict(args)
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)
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builder = Builder(soc, **builder_argdict(args), bios_options=["TERM_MINI"])
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soc.platform.add_extension(tec0117._sdcard_pmod_io)
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if args.with_spi_sdcard:
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soc.add_spi_sdcard()
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if args.with_sdcard:
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soc.add_sdcard()
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builder = Builder(soc, **builder_argdict(args))
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builder.build(run=args.build)
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if args.load:
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