Hardware
/
litex-boards
mirror of https://github.com/litex-hub/litex-boards.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

targets/nexys4ddr: fix typo

This commit is contained in:
Florent Kermarrec 2020-01-17 13:15:22 +01:00
parent bb99a8dd0c
commit 908539d49f
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
litex_boards/official/targets/nexys4ddr.py
View File

@ -79,7 +79,7 @@ class EthernetSoC(BaseSoC):
# Ethernet ---------------------------------------------------------------------------------
# phy
self.submodules.ethphy = LiteEthPHYMII(
self.submodules.ethphy = LiteEthPHYRMII(
clock_pads = self.platform.request("eth_clocks"),
pads = self.platform.request("eth"))
self.add_csr("ethphy")