efinix_trion_t120_bga576_dev_kit: Add Flash support (Through openFPGALoader).
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@ -78,6 +78,7 @@ def main():
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parser = argparse.ArgumentParser(description="LiteX SoC on Efinix Trion T120 BGA576 Dev Kit")
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parser = argparse.ArgumentParser(description="LiteX SoC on Efinix Trion T120 BGA576 Dev Kit")
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parser.add_argument("--build", action="store_true", help="Build bitstream")
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parser.add_argument("--build", action="store_true", help="Build bitstream")
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parser.add_argument("--load", action="store_true", help="Load bitstream")
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parser.add_argument("--load", action="store_true", help="Load bitstream")
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parser.add_argument("--flash", action="store_true", help="Flash bitstream")
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parser.add_argument("--sys-clk-freq", default=100e6, help="System clock frequency (default: 100MHz)")
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parser.add_argument("--sys-clk-freq", default=100e6, help="System clock frequency (default: 100MHz)")
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parser.add_argument("--with-spi-flash", action="store_true", help="Enable SPI Flash (MMAPed)")
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parser.add_argument("--with-spi-flash", action="store_true", help="Enable SPI Flash (MMAPed)")
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builder_args(parser)
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builder_args(parser)
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@ -95,5 +96,10 @@ def main():
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prog = soc.platform.create_programmer()
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prog = soc.platform.create_programmer()
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prog.load_bitstream(os.path.join(builder.gateware_dir, f"outflow/{soc.build_name}.bit"))
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prog.load_bitstream(os.path.join(builder.gateware_dir, f"outflow/{soc.build_name}.bit"))
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if args.flash:
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from litex.build.openfpgaloader import OpenFPGALoader
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prog = OpenFPGALoader("trion_t120_bga576")
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prog.flash(0, os.path.join(builder.gateware_dir, f"outflow/{soc.build_name}.hex"))
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if __name__ == "__main__":
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if __name__ == "__main__":
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main()
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main()
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