Hardware
/
litex-boards
mirror of https://github.com/litex-hub/litex-boards.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #332 from tcal-x/prog-cmod-a7 

Add openocd programmer for Digilent CMOD A7.
This commit is contained in:
enjoy-digital 2022-01-21 08:05:22 +01:00 committed by GitHub
parent 95766915b3 e0c4c0fe39
commit b8aad4b030
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 8 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
litex_boards/platforms/digilent_cmod_a7.py
View File

@ -69,6 +69,10 @@ class Platform(XilinxPlatform):
}[variant] }[variant]
XilinxPlatform.__init__(self, device, _io, _connectors, toolchain=toolchain) XilinxPlatform.__init__(self, device, _io, _connectors, toolchain=toolchain)
def create_programmer(self):
bscan_spi = "bscan_spi_xc7a15t.bit" if "xc7a15t" in self.device else "bscan_spi_xc7a35t.bit"
return OpenOCD("openocd_xc7_ft2232.cfg", bscan_spi)
def do_finalize(self,fragment): def do_finalize(self,fragment):
XilinxPlatform.do_finalize(self, fragment) XilinxPlatform.do_finalize(self, fragment)
self.add_period_constraint(self.lookup_request("clk12", loose=True), self.default_clk_period) self.add_period_constraint(self.lookup_request("clk12", loose=True), self.default_clk_period)

4
litex_boards/targets/digilent_cmod_a7.py
View File

@ -158,5 +158,9 @@ def main():
builder.build(**builder_kwargs, run=args.build) builder.build(**builder_kwargs, run=args.build)
if args.load:
prog = soc.platform.create_programmer()
prog.load_bitstream(os.path.join(builder.gateware_dir, soc.build_name + ".bit"))
if __name__ == "__main__": if __name__ == "__main__":
main() main()