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targets/mnt_rkx7/usb_ohci: Use SoC.bus if SoC does not have a DMA bus.
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1 changed files with 2 additions and 1 deletions
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@ -173,7 +173,8 @@ class BaseSoC(SoCCore):
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if with_usb_host:
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self.usb_ohci = USBOHCI(platform, platform.request("usb"))
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self.bus.add_slave("usb_ohci_ctrl", self.usb_ohci.wb_ctrl, region=SoCRegion(origin=self.mem_map["usb_ohci"], size=0x100000, cached=False))
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self.dma_bus.add_master("usb_ohci_dma", master=self.usb_ohci.wb_dma)
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dma_bus = getattr(self, "dma_bus", self.bus)
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dma_bus.add_master("usb_ohci_dma", master=self.usb_ohci.wb_dma)
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self.comb += self.cpu.interrupt[16].eq(self.usb_ohci.interrupt)
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# LiteScope UART
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