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official/platforms/versa_ecp5: add serdes refclk/sma 

Sync up with litex commit #ae9c25b74.
This commit is contained in:
Gabriel Somlo 2019-10-29 11:54:14 -04:00
parent 91083f99a8
commit c83e10d9f3
1 changed files with 20 additions and 0 deletions
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20
litex_boards/official/platforms/versa_ecp5.py
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@ -121,6 +121,26 @@ _io = [
Subsignal("tx_n", Pins("W5")),
Subsignal("perst", Pins("A6"), IOStandard("LVCMOS33")),
),
("refclk_en", 0, Pins("C12"), IOStandard("LVCMOS33")),
("refclk_rst_n", 0, Pins("R1"), IOStandard("LVCMOS33")),
("refclk", 0,
Subsignal("p", Pins("Y11")),
Subsignal("n", Pins("Y12")),
),
("refclk", 1,
Subsignal("p", Pins("Y19")),
Subsignal("n", Pins("W20")),
),
("sma_tx", 0,
Subsignal("p", Pins("W8")),
Subsignal("n", Pins("W9")),
),
("sma_rx", 0,
Subsignal("p", Pins("Y7")),
Subsignal("n", Pins("Y8")),
),
]