Review feedback - rename dvt to pvt - remove serial from both pvt and hacker - remove NC spi wp and hold pins from hacker - remove spiflash4x as pins are NC Added links to schematic/cad data
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@ -1,3 +1,6 @@
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# fomu evt board from from crowd funding
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# design files at https://github.com/im-tomu/fomu-hardware/tree/evt/hardware/pcb
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#
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticePlatform
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from litex.build.lattice.programmer import IceStormProgrammer
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# fomu hacker board
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# schematic at https://github.com/im-tomu/fomu-hardware/tree/master/hacker/releases/v0.0-19-g154fecc
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#
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticePlatform
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from litex.build.lattice.programmer import IceStormProgrammer
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_io = [
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("serial", 0,
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Subsignal("rx", Pins("C3")),
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Subsignal("tx", Pins("B3"), Misc("PULLUP")),
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IOStandard("LVCMOS33")
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),
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("rgb_led", 0,
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Subsignal("r", Pins("C5")),
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Subsignal("g", Pins("B5")),
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@ -41,13 +40,6 @@ _io = [
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Subsignal("clk", Pins("D1"), IOStandard("LVCMOS33")),
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Subsignal("mosi", Pins("F1"), IOStandard("LVCMOS33")),
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Subsignal("miso", Pins("E1"), IOStandard("LVCMOS33")),
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Subsignal("wp", Pins("A1"), IOStandard("LVCMOS33")),
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Subsignal("hold", Pins("B1"), IOStandard("LVCMOS33")),
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),
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("spiflash4x", 0,
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Subsignal("cs_n", Pins("C1"), IOStandard("LVCMOS33")),
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Subsignal("clk", Pins("D1"), IOStandard("LVCMOS33")),
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Subsignal("dq", Pins("E1 F1 A1 B1"), IOStandard("LVCMOS33")),
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),
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]
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@ -0,0 +1,76 @@
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# fomu pvt board from crowd funding
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# design files at https://github.com/im-tomu/fomu-hardware/tree/pvt/hardware/pcb
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#
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticePlatform
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from litex.build.lattice.programmer import IceStormProgrammer
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_io = [
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("rgb_led", 0,
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Subsignal("r", Pins("C5")),
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Subsignal("g", Pins("B5")),
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Subsignal("b", Pins("A5")),
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IOStandard("LVCMOS33")
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),
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# alias blue led
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("user_led_n", 0, Pins("A5"), IOStandard("LVCMOS33")),
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("usb", 0,
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Subsignal("d_p", Pins("A1")),
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Subsignal("d_n", Pins("A2")),
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Subsignal("pullup", Pins("A4")),
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IOStandard("LVCMOS33")
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),
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("clk48", 0, Pins("F4"), IOStandard("LVCMOS33")),
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# Adesto AT25SF161 - 16-Mbit - 2 megabyte
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# Supports SPI Modes 0 and 3
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# Supports Dual and Quad Output Read
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#
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("spiflash", 0,
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Subsignal("cs_n", Pins("C1"), IOStandard("LVCMOS33")),
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Subsignal("clk", Pins("D1"), IOStandard("LVCMOS33")),
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Subsignal("mosi", Pins("F1"), IOStandard("LVCMOS33")),
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Subsignal("miso", Pins("E1"), IOStandard("LVCMOS33")),
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Subsignal("wp", Pins("F2"), IOStandard("LVCMOS33")),
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Subsignal("hold", Pins("B1"), IOStandard("LVCMOS33")),
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),
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("spiflash4x", 0,
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Subsignal("cs_n", Pins("C1"), IOStandard("LVCMOS33")),
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Subsignal("clk", Pins("D1"), IOStandard("LVCMOS33")),
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Subsignal("dq", Pins("E1 F1 F2 B1"), IOStandard("LVCMOS33")),
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),
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]
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_connectors = [
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# Pins
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# Pin 1
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# Pin 2
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# Pin 3
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# Pin 4
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("touch_pins", "E4 D5 E5 F5"),
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]
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class Platform(LatticePlatform):
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default_clk_name = "clk48"
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default_clk_period = 20.833
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gateware_size = 0x20000
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# FIXME: Create a "spi flash module" object in the same way we have SDRAM
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spiflash_model = "n25q32"
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spiflash_read_dummy_bits = 8
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spiflash_clock_div = 2
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spiflash_total_size = int((16/8)*1024*1024) # 16Mbit, 1megabytes
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spiflash_page_size = 256
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spiflash_sector_size = 0x10000
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def __init__(self):
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LatticePlatform.__init__(
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self, "ice40-up5k-uwg30", _io, _connectors, toolchain="icestorm")
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def create_programmer(self):
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return IceStormProgrammer()
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