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targets/efinix: Now rely in LiteX to automatically exclude Tristate IOs.

This commit is contained in:
Florent Kermarrec 2023-08-30 09:59:23 +02:00
parent 4bb064853d
commit c960e85d11
2 changed files with 0 additions and 6 deletions
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3
litex_boards/targets/efinix_titanium_ti60_f225_dev_kit.py
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@ -91,9 +91,6 @@ class BaseSoC(SoCCore):
if with_etherbone:
self.add_etherbone(phy=self.ethphy)
# FIXME: Avoid this.
platform.toolchain.excluded_ios.append(platform.lookup_request("eth").mdio)
# Extension board on P2 + External Logic Analyzer.
_pmod_ios = [
("debug", 0, Pins(

3
litex_boards/targets/efinix_trion_t120_bga576_dev_kit.py
View File

@ -72,7 +72,6 @@ class BaseSoC(SoCCore):
from litespi.modules import W25Q128JV
from litespi.opcodes import SpiNorFlashOpCodes as Codes
self.add_spi_flash(mode="4x", module=W25Q128JV(Codes.READ_1_1_4), with_master=True)
platform.toolchain.excluded_ios.append(platform.lookup_request("spiflash4x").dq)
# Leds -------------------------------------------------------------------------------------
if with_led_chaser:
@ -99,8 +98,6 @@ class BaseSoC(SoCCore):
clock_pads = platform.request("eth_clocks", eth_phy),
pads = platform.request("eth", eth_phy),
with_hw_init_reset = False)
# FIXME: Avoid this.
platform.toolchain.excluded_ios.append(platform.lookup_request("eth").mdio)
# Use Ethernet RMII PMOD.
else:
from litex.build.generic_platform import Pins, Subsignal, IOStandard