Merge pull request #578 from hansfbaier/qmtech-optional-core-resources
qmtech core boards: make core resources optional
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commit
cb84141cec
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@ -130,7 +130,7 @@ class Platform(AlteraPlatform):
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),
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]
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def __init__(self, toolchain="quartus", with_daughterboard=False):
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def __init__(self, toolchain="quartus", with_daughterboard=False, with_core_resources=True):
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device = "10CL006YU256C8G"
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io = _io
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connectors = _connectors
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@ -140,7 +140,7 @@ class Platform(AlteraPlatform):
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daughterboard = QMTechDaughterboard(IOStandard("3.3-V LVTTL"))
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io += daughterboard.io
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connectors += daughterboard.connectors
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else:
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elif with_core_resources:
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io += self.core_resources
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AlteraPlatform.__init__(self, device, io, connectors, toolchain=toolchain)
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@ -129,7 +129,7 @@ class Platform(AlteraPlatform):
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),
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]
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def __init__(self, toolchain="quartus", with_daughterboard=False):
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def __init__(self, toolchain="quartus", with_daughterboard=False, with_core_resources=True):
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device = "5CEFA2F23C8"
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io = _io
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connectors = _connectors
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@ -139,7 +139,7 @@ class Platform(AlteraPlatform):
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daughterboard = QMTechDaughterboard(IOStandard("3.3-V LVTTL"))
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io += daughterboard.io
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connectors += daughterboard.connectors
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else:
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elif with_core_resources:
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io += self.core_resources
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AlteraPlatform.__init__(self, device, io, connectors, toolchain=toolchain)
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@ -132,7 +132,7 @@ class Platform(AlteraPlatform):
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),
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]
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def __init__(self, toolchain="quartus", with_daughterboard=False):
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def __init__(self, toolchain="quartus", with_daughterboard=False, with_core_resources=True):
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device = "5CEFA5F23I7"
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io = _io
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connectors = _connectors
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@ -142,7 +142,7 @@ class Platform(AlteraPlatform):
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daughterboard = QMTechDaughterboard(IOStandard("3.3-V LVCMOS"))
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io += daughterboard.io
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connectors += daughterboard.connectors
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else:
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elif with_core_resources:
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io += self.core_resources
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AlteraPlatform.__init__(self, device, io, connectors, toolchain=toolchain)
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@ -130,7 +130,7 @@ class Platform(AlteraPlatform):
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),
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]
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def __init__(self, variant="ep4ce15", toolchain="quartus", with_daughterboard=False):
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def __init__(self, variant="ep4ce15", toolchain="quartus", with_daughterboard=False, with_core_resources=True):
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device = {
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"ep4ce15": "EP4CE15F23C8",
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"ep4ce55": "EP4CE55F23C8"
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@ -143,7 +143,7 @@ class Platform(AlteraPlatform):
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daughterboard = QMTechDaughterboard(IOStandard("3.3-V LVTTL"))
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io += daughterboard.io
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connectors += daughterboard.connectors
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else:
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elif with_core_resources:
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io += self.core_resources
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AlteraPlatform.__init__(self, device, io, connectors, toolchain=toolchain)
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@ -131,7 +131,7 @@ class Platform(AlteraPlatform):
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),
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]
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def __init__(self, toolchain="quartus", with_daughterboard=False):
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def __init__(self, toolchain="quartus", with_daughterboard=False, with_core_resources=True):
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device = "EP4CGX150DF27I7"
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io = _io
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connectors = _connectors
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@ -141,7 +141,7 @@ class Platform(AlteraPlatform):
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daughterboard = QMTechDaughterboard(IOStandard("3.3-V LVTTL"))
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io += daughterboard.io
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connectors += daughterboard.connectors
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else:
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elif with_core_resources:
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io += self.core_resources
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AlteraPlatform.__init__(self, device, io, connectors, toolchain=toolchain)
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@ -145,7 +145,7 @@ class Platform(Xilinx7SeriesPlatform):
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("cpu_reset", 0, Pins("K5"), IOStandard("LVCMOS33")),
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]
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def __init__(self, toolchain="vivado", with_daughterboard=False):
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def __init__(self, toolchain="vivado", with_daughterboard=False, with_core_resources=True):
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device = "xc7a35tftg256-1"
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io = _io
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connectors = _connectors
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@ -155,7 +155,7 @@ class Platform(Xilinx7SeriesPlatform):
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daughterboard = QMTechDaughterboard(IOStandard("LVCMOS33"))
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io += daughterboard.io
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connectors += daughterboard.connectors
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else:
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elif with_core_resources:
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io += self.core_resources
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Xilinx7SeriesPlatform.__init__(self, device, io, connectors, toolchain=toolchain)
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@ -151,7 +151,7 @@ class Platform(XilinxPlatform):
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("user_led", 1, Pins("H26"), IOStandard("LVCMOS33")),
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]
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def __init__(self, toolchain="vivado", with_daughterboard=False):
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def __init__(self, toolchain="vivado", with_daughterboard=False, with_core_resources=True):
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device = "xc7k325tffg676-1"
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io = _io
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connectors = _connectors
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@ -162,7 +162,7 @@ class Platform(XilinxPlatform):
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daughterboard = QMTechDaughterboard(IOStandard("LVCMOS33"))
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io += daughterboard.io
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connectors += daughterboard.connectors
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else:
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elif with_core_resources:
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io += self.core_resources_standalone
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XilinxPlatform.__init__(self, device, io, connectors, toolchain=toolchain)
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