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targets/colorlight_5a_75x: fix rx_data pin order for Ethernet PHY 0

This commit is contained in:
DerFetzer 2020-09-02 22:04:23 +02:00
parent 24b853c2db
commit cc78574297
1 changed files with 1 additions and 1 deletions
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2
litex_boards/platforms/colorlight_5a_75e.py
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@ -156,7 +156,7 @@ _io_v6_0 = [
Subsignal("mdio", Pins("T4")),
Subsignal("mdc", Pins("R5")),
Subsignal("rx_ctl", Pins("J2")),
Subsignal("rx_data", Pins("J3 K2 K1 K3")),
Subsignal("rx_data", Pins("K2 J3 K1 K3")),
Subsignal("tx_ctl", Pins("L2")),
Subsignal("tx_data", Pins("M2 M1 P1 R1")),
IOStandard("LVCMOS33")