targets/ulx3s/add_oled: simplify.
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@ -114,17 +114,13 @@ class BaseSoC(SoCCore):
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def add_oled(self):
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def add_oled(self):
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pads = self.platform.request("oled_spi")
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pads = self.platform.request("oled_spi")
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pads.miso = Signal()
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pads.miso = Signal()
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oled = SPIMaster(pads, 8, self.sys_clk_freq, 8e6)
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self.submodules.oled_spi = SPIMaster(pads, 8, self.sys_clk_freq, 8e6)
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oled.add_clk_divider()
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self.oled_spi.add_clk_divider()
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self.submodules.oled_spi = oled
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self.add_csr("oled_spi")
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self.add_csr("oled_spi")
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ctl_pads = self.platform.request("oled_ctl")
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self.submodules.oled_ctl = GPIOOut(self.platform.request("oled_ctl"))
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oled_ctl = GPIOOut(ctl_pads)
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self.submodules.oled_ctl = oled_ctl
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self.add_csr("oled_ctl")
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self.add_csr("oled_ctl")
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# Build --------------------------------------------------------------------------------------------
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# Build --------------------------------------------------------------------------------------------
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def main():
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def main():
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