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5 Commits

Author SHA1 Message Date
Florent Kermarrec 9d452b0d74 targets: Create target_group for target arguments. 2022-03-21 18:37:40 +01:00
Florent Kermarrec cc8da9d341 targets: Simplify imports and switch to LiteXSocArgumentParser. 
CPU parameters are now selectively exposed to the user:
./digilent_arty.py --cpu-type=vexriscv_smp --help will show VexRiscv-SMP parameters.
./digilent_arty.py --cpu-type=naxriscv --help will show NaxRiscv parameters.
 2022-03-21 16:59:40 +01:00
Florent Kermarrec 773444a7dd targets: Switch to get_bios_filename/get_bitstream_filename. 2022-03-17 09:21:05 +01:00
Florent Kermarrec 0745162a29 xilinx_zcu102: Review/Cleanup for consistency with others boards. 
Also remove INTERNAL_VREF constraints that are not yet useful (required for DRAM).
 2022-03-16 18:47:05 +01:00
Joseph Faye adbcc2e547
add zcu102 target file 2022-03-16 15:55:37 +01:00