Florent Kermarrec
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ec4ccc9fa5
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platforms/xcu1525: fix ddram 1/2/3 pinout.
DDR4 now validated successfully with LiteDRAM on the 4 channels.
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2020-12-11 13:58:26 +01:00 |
|
Florent Kermarrec
|
1f52fbaca6
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xcu1525: fix last ddram channel numbering.
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2020-11-06 10:48:26 +01:00 |
|
Florent Kermarrec
|
c093d0d0fc
|
platforms: cleanup pass to uniformize comments/separators/orders.
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2020-11-03 10:48:57 +01:00 |
|
Florent Kermarrec
|
982cfd5ad5
|
platforms/xcu1525: fix ddram constraints, add clk300 constraints for all channels.
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2020-10-13 11:50:36 +02:00 |
|
Florent Kermarrec
|
c6610b4a3f
|
platforms/xcu1525: update ddram1/2/3 pinout.
Using https://github.com/d953i/Custom_Part_Data_Files/blob/master/Boards/Xilinx_BCU1525/BCU1525_DIMMx.xdc
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2020-09-20 21:07:00 +02:00 |
|
Florent Kermarrec
|
e5a144e9cd
|
platforms/xcu1525: update ddram0 pinout.
Using https://github.com/d953i/Custom_Part_Data_Files/blob/master/Boards/Xilinx_BCU1525/BCU1525_DIMM0.xdc.
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2020-09-19 23:28:34 +02:00 |
|
Florent Kermarrec
|
8ffb86c0dc
|
platforms/fk33/xcu1525: define pcie_x2/x4/x8/x16.
|
2020-09-19 22:37:05 +02:00 |
|
Florent Kermarrec
|
ad48728160
|
xcu1525: update headers (were still using old format).
|
2020-09-04 19:59:09 +02:00 |
|
Florent Kermarrec
|
2eda9d0252
|
xcu1525: add DDR4 IOs for C1/C2/C3 and fix compilation (untested).
|
2020-09-04 11:34:33 +02:00 |
|
Florent Kermarrec
|
7b6b71d4e3
|
xcu1525: add initial DDR4 support in C0 (untested).
|
2020-09-03 19:48:23 +02:00 |
|
Florent Kermarrec
|
51e881d1ff
|
add minimal xcu1525 support (VCU1525 or BCU1525 boards).
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2020-09-03 19:06:43 +02:00 |