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2 Commits

Author SHA1 Message Date
Gwenhael Goavec-Merou 9960f38d95 targets: replace LiteXSoCArgumentParser by LiteXArgumentParser, remove tasks done LiteXArgumentParser 2022-11-06 11:27:47 +01:00
Icenowy Zheng 745ebbbfa1 Add ISX iM1283 board 
ISX iM1283 is a "simple eDP signal generator" which utilizes a XC7A100T
FPGA, and come with a header populated with the FPGA's JTAG.

This commit adds initial reverse engineered IOs including the DDR3 DRAM
(which cannot work reliably @ DDR3-800, so the system clock is defaultly
set to 80MHz now), two LEDs and SD slot.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
 2022-10-14 22:50:43 +08:00