alainlou 1333f89ed6 rz_easyfpga: adjust SDRAM clk phase ... - also add 1:2 rate		2021-09-22 00:26:28 -04:00
..
platforms	rz_easyfpga: adjust SDRAM clk phase	2021-09-22 00:26:28 -04:00
prog	Add intial ButterStick support (with just Clk, Buttons and Leds).	2021-09-01 17:33:54 +02:00
targets	rz_easyfpga: adjust SDRAM clk phase	2021-09-22 00:26:28 -04:00
tools	general: add SPDX License identifier to header and specify files are part of LiteX-Boards.	2020-08-23 15:00:17 +02:00
__init__.py	Add initial RZ-EasyFPGA support! (#270)	2021-09-21 09:55:22 +02:00