Florent Kermarrec 2b17dc1b89 target: add rst signal to CRG to allow full reset of the SoC on reboot command.		2020-11-04 11:13:42 +01:00
..
platforms	platforms/icebreaker: fix refactoring typo.	2020-11-04 09:30:01 +01:00
prog	platforms/genesys2: add openocd specific configuration (channel 1 used for JTAG).	2020-06-23 11:55:50 +02:00
targets	target: add rst signal to CRG to allow full reset of the SoC on reboot command.	2020-11-04 11:13:42 +01:00
tools	general: add SPDX License identifier to header and specify files are part of LiteX-Boards.	2020-08-23 15:00:17 +02:00
__init__.py	init repo with litex official boards	2019-06-10 17:11:36 +02:00