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litex-boards
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2d8a4ef9ec
litex-boards
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litex_boards
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Florent Kermarrec
2d8a4ef9ec
targets/de1_soc: use CycloneVPLL, remove 50MHz limitation.
2020-04-08 08:07:37 +02:00
..
platforms
colorlight_5a_75b: add SoC with regular UART (on J19).
2020-04-03 10:28:53 +02:00
targets
targets/de1_soc: use CycloneVPLL, remove 50MHz limitation.
2020-04-08 08:07:37 +02:00
__init__.py
init repo with litex official boards
2019-06-10 17:11:36 +02:00