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Fin Maaß 362a28b72a
efinix: fix reset 
fix reset on all efinix boards.
To reset the PLL a pulse is needed, which
has to be driven by a clock that is
not generated by the PLL.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2024-10-08 13:51:09 +02:00
..
platforms efinix: fix reset 2024-10-08 13:51:09 +02:00
prog xilinx_zc706: new Xilinx/AMD Zynq7000 based board 2024-03-26 20:49:54 +01:00
targets efinix: fix reset 2024-10-08 13:51:09 +02:00
__init__.py litex_boards: Remove short imports since not really longer useful and mess up Python imports. 2022-05-03 17:53:57 +02:00