.. |
__init__.py
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Avoid Official/Partner/Community differentiation: use same directory for all platforms/targets.
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2020-02-03 09:36:30 +01:00 |
ac701.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
acorn_cle_215.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
aller.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
alveo_u250.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
arty.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
arty_s7.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
c10lprefkit.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
camlink_4k.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
colorlight_5a_75x.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
crosslink_nx_evn.py
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Lattice NX PLL Support
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2020-11-08 20:34:46 -06:00 |
crosslink_nx_vip.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
de0nano.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
de1soc.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
de2_115.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
de10lite.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
de10nano.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
ecp5_evn.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
ecpix5.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
fk33.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
fomu.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
genesys2.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
hadbadge.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
icebreaker.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
kc705.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
kcu105.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
kx2.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
linsn_rv901t.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
logicbone.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
mercury_xu5.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
mimas_a7.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
minispartan6.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
mist.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
nereid.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
netv2.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
nexys4ddr.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
nexys_video.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
orangecrab.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
pano_logic_g2.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
pipistrello.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
simple.py
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general: add SPDX License identifier to header and specify files are part of LiteX-Boards.
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2020-08-23 15:00:17 +02:00 |
tagus.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
tec0117.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
trellisboard.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
ulx3s.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
vc707.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
vcu118.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
versa_ecp5.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
xcu1525.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
zcu104.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |
zybo_z7.py
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target: add rst signal to CRG to allow full reset of the SoC on reboot command.
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2020-11-04 11:13:42 +01:00 |