litex-boards/litex_boards
2020-08-07 19:26:12 +02:00
..
platforms arty: Change USB-uart and I2S Pmod configuration 2020-08-05 11:54:25 +02:00
prog platforms/genesys2: add openocd specific configuration (channel 1 used for JTAG). 2020-06-23 11:55:50 +02:00
targets targets/colorlight_5a_75x: enable HalfRate SDRAM PHY. 2020-08-07 19:26:12 +02:00
tools tools/extract_xdc_pins: +x. 2020-05-16 11:12:46 +02:00
__init__.py