Florent Kermarrec abccd12058 tec0117: add initial SDRAM support for the embedded SDRAM of the SIP. ... Still a WIP but able to do the P&R with modifications on LiteX to generate the IO_PORT constraints but not the IO_LOC for the SDRAM pins.		2021-01-29 22:28:40 +01:00
..
platforms	tec0117: add initial SDRAM support for the embedded SDRAM of the SIP.	2021-01-29 22:28:40 +01:00
prog	Add FPC-III board support.	2021-01-28 09:51:42 -07:00
targets	tec0117: add initial SDRAM support for the embedded SDRAM of the SIP.	2021-01-29 22:28:40 +01:00
tools	general: add SPDX License identifier to header and specify files are part of LiteX-Boards.	2020-08-23 15:00:17 +02:00
__init__.py	init repo with litex official boards	2019-06-10 17:11:36 +02:00