litex-boards/litex_boards
Florent Kermarrec 982038508e alinx_axau15/PCIe: Switch to Gen3/128-bit for now (configuration used on others Ultrascale+ Gen3 X4 boards). 2023-12-28 19:56:52 +01:00
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platforms alinx_axau15: First review/cleanup pass and fix missing INTERNAL_VREF on bank 66. 2023-12-28 19:48:50 +01:00
prog prog/openocd_ecpix5.cfg: refresh/fix 2023-12-13 18:34:02 +01:00
targets alinx_axau15/PCIe: Switch to Gen3/128-bit for now (configuration used on others Ultrascale+ Gen3 X4 boards). 2023-12-28 19:56:52 +01:00
__init__.py litex_boards: Remove short imports since not really longer useful and mess up Python imports. 2022-05-03 17:53:57 +02:00