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Icenowy Zheng b1107e94d4 sitlinv_stlv7325: use S7PLL instead of S7MMCM for system clock 
As we do not need fine phase tweaking for the main system clock, use
S7PLL instead of S7MMCM to allow higher VCO frequency and more flexible
sys_clk_freq.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2023-04-03 16:45:13 +08:00
..
platforms Merge pull request #487 from ICE-V-Wireless/master 2023-04-02 11:44:02 +02:00
prog Basic SoC for Opal Kelly XEM8320 2023-02-28 13:19:12 -07:00
targets sitlinv_stlv7325: use S7PLL instead of S7MMCM for system clock 2023-04-03 16:45:13 +08:00
__init__.py litex_boards: Remove short imports since not really longer useful and mess up Python imports. 2022-05-03 17:53:57 +02:00