litex-boards/litex_boards/partner
Florent Kermarrec dcc65b347d targets/colorlight_5a_75b: switch to SoCCore, CPU and Etherbone working :)
Tested with:
./colorlight_5a_75b.py --cpu-type=picorv32 --uart-name=crossover --with-etherbone --csr-csv=csr.csv

Load with following script:
#!/usr/bin/env python3

# Load ---------------------------------------------------------------------------------------------

def load():
    import os
    f = open("openocd.cfg", "w")
    f.write(
"""
interface ftdi
ftdi_vid_pid 0x0403 0x6011
ftdi_channel 0
ftdi_layout_init 0x0098 0x008b
reset_config none
adapter_khz 25000
jtag newtap ecp5 tap -irlen 8 -expected-id 0x41111043
""")
    f.close()
    os.system("openocd -f openocd.cfg -c \"transport select jtag; init; svf soc_etherbonesoc_colorlight_5a_75b/gateware/top.svf; exit\"")
    exit()

if __name__ == "__main__":
    load()


Then start lxserver:
lxserver --udp

And run following script:

#!/usr/bin/env python3

import sys

from litex import RemoteClient

wb = RemoteClient()
wb.open()

# # #

while True:
    if wb.regs.uart_xover_rxempty.read() == 0:
        print(chr(wb.regs.uart_xover_rxtx.read()), end="")
        sys.stdout.flush()

# # #

wb.close()
2020-01-22 15:57:52 +01:00
..
platforms colorlight_5a_75b/v7.0: update eth_clocks/rx pinout, remove FIXME 2020-01-22 14:56:17 +01:00
targets targets/colorlight_5a_75b: switch to SoCCore, CPU and Etherbone working :) 2020-01-22 15:57:52 +01:00
__init__.py Turn litex_boards.partner into module 2019-07-01 19:36:34 +02:00