21 lines
626 B
Python
21 lines
626 B
Python
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from migen.fhdl.structure import *
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from migen.fhdl.module import Module
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from migen.genlib.cdc import MultiReg
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from migen.bank.description import *
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class GPIOIn(Module, AutoCSR):
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def __init__(self, signal):
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self._r_in = CSRStatus(len(signal))
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self.specials += MultiReg(signal, self._r_in.status)
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class GPIOOut(Module, AutoCSR):
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def __init__(self, signal):
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self._r_out = CSRStorage(len(signal))
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self.comb += signal.eq(self._r_out.storage)
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class Blinker(Module):
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def __init__(self, signal, divbits=26):
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counter = Signal(divbits)
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self.comb += signal.eq(counter[divbits-1])
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self.sync += counter.eq(counter + 1)
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