2015-01-27 17:46:15 -05:00
|
|
|
#!/usr/bin/env python3
|
|
|
|
|
|
|
|
|
|
import sys, os
|
|
|
|
|
from setuptools import setup
|
|
|
|
|
from setuptools import find_packages
|
|
|
|
|
|
|
|
|
|
here = os.path.abspath(os.path.dirname(__file__))
|
|
|
|
|
README = open(os.path.join(here, "README")).read()
|
|
|
|
|
|
|
|
|
|
required_version = (3, 3)
|
|
|
|
|
if sys.version_info < required_version:
|
2015-01-27 18:36:09 -05:00
|
|
|
raise SystemExit("LiteEth requires python {0} or greater".format(
|
2015-01-27 17:46:15 -05:00
|
|
|
".".join(map(str, required_version))))
|
|
|
|
|
|
|
|
|
|
setup(
|
|
|
|
|
name="liteethernet",
|
|
|
|
|
version="unknown",
|
2015-01-27 18:36:09 -05:00
|
|
|
description="small footprint and configurable Ethernet core",
|
2015-01-27 17:46:15 -05:00
|
|
|
long_description=README,
|
|
|
|
|
author="Florent Kermarrec",
|
|
|
|
|
author_email="florent@enjoy-digital.fr",
|
|
|
|
|
url="http://enjoy-digital.fr",
|
2015-01-27 18:36:09 -05:00
|
|
|
download_url="https://github.com/enjoy-digital/liteeth",
|
2015-01-27 17:46:15 -05:00
|
|
|
packages=find_packages(here),
|
|
|
|
|
license="GPL",
|
|
|
|
|
platforms=["Any"],
|
|
|
|
|
keywords="HDL ASIC FPGA hardware design",
|
|
|
|
|
classifiers=[
|
|
|
|
|
"Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
|
|
|
|
|
"Environment :: Console",
|
|
|
|
|
"Development Status :: Alpha",
|
|
|
|
|
"Intended Audience :: Developers",
|
|
|
|
|
"License :: OSI Approved :: GNU General Public License (GPL)",
|
|
|
|
|
"Operating System :: OS Independent",
|
|
|
|
|
"Programming Language :: Python",
|
|
|
|
|
],
|
|
|
|
|
)
|
