2015-09-22 12:36:47 -04:00
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from migen import *
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2015-03-01 04:01:23 -05:00
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from migen.genlib.record import Record
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2015-11-01 09:38:06 -05:00
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from misoc.cores.dvi_sampler.common import control_tokens, channel_layout
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2015-03-01 04:01:23 -05:00
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2015-04-13 10:47:22 -04:00
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2015-03-01 04:01:23 -05:00
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class Decoding(Module):
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2015-04-13 10:19:55 -04:00
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def __init__(self):
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self.valid_i = Signal()
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self.input = Signal(10)
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self.valid_o = Signal()
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self.output = Record(channel_layout)
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2015-03-01 04:01:23 -05:00
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2015-04-13 10:19:55 -04:00
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###
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2015-03-01 04:01:23 -05:00
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2015-04-13 10:19:55 -04:00
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self.sync.pix += self.output.de.eq(1)
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for i, t in enumerate(control_tokens):
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self.sync.pix += If(self.input == t,
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self.output.de.eq(0),
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self.output.c.eq(i)
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)
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self.sync.pix += self.output.d[0].eq(self.input[0] ^ self.input[9])
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for i in range(1, 8):
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self.sync.pix += self.output.d[i].eq(self.input[i] ^ self.input[i-1] ^ ~self.input[8])
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self.sync.pix += self.valid_o.eq(self.valid_i)
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