interconnect/axi: remove bus_name on connect_to_pads
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@ -110,7 +110,7 @@ class AXILiteInterface(Record):
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ios = [(bus_name , 0) + tuple(subsignals)]
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return ios
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def connect_to_pads(self, pads, bus_name, mode="master"):
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def connect_to_pads(self, pads, mode="master"):
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assert mode in ["slave", "master"]
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r = []
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def swap_mode(mode): return "master" if mode == "slave" else "slave"
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@ -102,7 +102,7 @@ class LiteXCore(SoCMini):
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self.bus.add_master(master=wb_bus)
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platform.add_extension(axi_bus.get_ios("axi"))
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axi_pads = platform.request("axi")
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self.comb += axi_bus.connect_to_pads(axi_pads, "axi", mode="slave")
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self.comb += axi_bus.connect_to_pads(axi_pads, mode="slave")
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# IRQs
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for name, loc in sorted(self.irq.locs.items()):
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