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tools/litex_json2dts_linux: Add initial CLINT DTS generation.

This commit is contained in:
Florent Kermarrec 2023-02-20 11:04:37 +01:00
parent ea308ea5b1
commit 01e9a54321
1 changed files with 11 additions and 2 deletions
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13
litex/tools/litex_json2dts_linux.py
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@ -81,8 +81,8 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
# CPU ------------------------------------------------------------------------------------------ # CPU ------------------------------------------------------------------------------------------
# VexRiscv-SMP # RISC-V
# ------------ # ------
if cpu_arch == "riscv": if cpu_arch == "riscv":
# Cache description. # Cache description.
cache_desc = "" cache_desc = ""
@ -272,6 +272,15 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
# Interrupt Controller ------------------------------------------------------------------------- # Interrupt Controller -------------------------------------------------------------------------
if cpu_arch == "riscv": if cpu_arch == "riscv":
# CHECKME: interrupts-extended.
dts += """
lintc0: clint@{clint_base:x} {{
compatible = "riscv,clint0";
interrupts-extended = <&L4 3 &L4 7>;
reg = <0x{clint_base:x} 0x10000>;
reg-names = "control";
}};
""".format(clint_base=d["memories"]["clint"]["base"])
dts += """ dts += """
intc0: interrupt-controller@{plic_base:x} {{ intc0: interrupt-controller@{plic_base:x} {{
compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";