cpu/microwatt: add standard+ghdl variant that uses GHDL Yosys plugin.
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@ -97,7 +97,7 @@ CPU_VARIANTS = {
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"linuxd" : [],
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"linuxd" : [],
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"linuxq" : [],
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"linuxq" : [],
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}
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}
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CPU_VARIANTS_EXTENSIONS = ["debug", "no-dsp"]
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CPU_VARIANTS_EXTENSIONS = ["debug", "no-dsp", "ghdl"]
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class InvalidCPUVariantError(ValueError):
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class InvalidCPUVariantError(ValueError):
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def __init__(self, variant):
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def __init__(self, variant):
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@ -11,7 +11,7 @@ from litex.soc.interconnect import wishbone
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from litex.soc.cores.cpu import CPU
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from litex.soc.cores.cpu import CPU
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CPU_VARIANTS = ["standard"]
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CPU_VARIANTS = ["standard", "standard+ghdl"]
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class Microwatt(CPU):
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class Microwatt(CPU):
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@ -94,7 +94,7 @@ class Microwatt(CPU):
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)
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)
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# add vhdl sources
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# add vhdl sources
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self.add_sources(platform)
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self.add_sources(platform, use_ghdl_yosys_plugin="ghdl" in self.variant)
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def set_reset_address(self, reset_address):
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def set_reset_address(self, reset_address):
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assert not hasattr(self, "reset_address")
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assert not hasattr(self, "reset_address")
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