cores/clock: cleanup

2019-07-23 09:53:48 +02:00 · 2019-07-23 09:53:48 +02:00 · 0acacbaa82
parent edf8aa8cfd
commit 0acacbaa82
1 changed files with 18 additions and 18 deletions
--- a/litex/soc/cores/clock.py
+++ b/litex/soc/cores/clock.py
@ -486,9 +486,9 @@ class ECP5PLL(Module):
    nclkouts_max = 3
    clkfb_div_range = (1, 128+1)
    clko_div_range  = (1, 128+1)
-    clki_freq_range = (8e6, 400e6)
+    clki_freq_range = (    8e6,  400e6)
    clko_freq_range = (3.125e6,  400e6)
-    vco_freq_range = (550e6, 1250e6)
+    vco_freq_range  = (  550e6, 1250e6)

    def __init__(self):
        self.reset = Signal()