cpu/rocket: move csr to IO region

2019-10-09 10:24:01 +02:00 · 2019-10-09 10:24:01 +02:00 · 10146abf0a
parent 7f1d4623ff
commit 10146abf0a
1 changed files with 1 additions and 1 deletions
--- a/litex/soc/cores/cpu/rocket/core.py
+++ b/litex/soc/cores/cpu/rocket/core.py
@ -64,7 +64,7 @@ class RocketRV64(CPU):
        return {
            "rom"  : 0x10000000,
            "sram" : 0x11000000,
-            "csr"  : 0x12000000,
+            "csr"  : 0x92000000,
        }

    @property