mirror of
https://github.com/enjoy-digital/litex.git
synced 2025-01-04 09:52:26 -05:00
actorlib/fifo: rewrite
* use classes for less code duplication * the idea of decorator is to avoid passing common parameters (e.g. clock domain names) in module constructors, so remove those parameters * style
This commit is contained in:
parent
87a68ecd57
commit
1209ec17f6
1 changed files with 24 additions and 33 deletions
|
@ -2,40 +2,31 @@ from migen.fhdl.std import *
|
|||
from migen.flow.actor import *
|
||||
from migen.genlib import fifo
|
||||
|
||||
def FIFOWrapper(sink, source, fifo):
|
||||
return [
|
||||
sink.ack.eq(fifo.writable),
|
||||
fifo.we.eq(sink.stb & sink.ack),
|
||||
fifo.din.eq(sink.payload),
|
||||
class _FIFOActor(Module):
|
||||
def __init__(self, fifo_class, layout, depth):
|
||||
self.sink = Sink(layout)
|
||||
self.source = Source(layout)
|
||||
self.busy = Signal()
|
||||
|
||||
source.stb.eq(fifo.readable),
|
||||
source.payload.eq(fifo.dout),
|
||||
fifo.re.eq(source.ack)
|
||||
###
|
||||
|
||||
self.submodules.fifo = fifo_class(layout, depth)
|
||||
|
||||
self.comb += [
|
||||
self.sink.ack.eq(self.fifo.writable),
|
||||
self.fifo.we.eq(self.sink.stb & self.sink.ack),
|
||||
self.fifo.din.eq(self.sink.payload),
|
||||
|
||||
self.source.stb.eq(self.fifo.readable),
|
||||
self.source.payload.eq(self.fifo.dout),
|
||||
self.fifo.re.eq(self.source.ack)
|
||||
]
|
||||
|
||||
class SyncFIFO(Module):
|
||||
|
||||
class SyncFIFO(_FIFOActor):
|
||||
def __init__(self, layout, depth):
|
||||
_FIFOActor.__init__(self, fifo.SyncFIFO, layout, depth)
|
||||
|
||||
self.sink = Sink(layout)
|
||||
self.source = Source(layout)
|
||||
self.busy = Signal()
|
||||
|
||||
_fifo = fifo.SyncFIFO(layout, depth)
|
||||
|
||||
self.submodules += _fifo
|
||||
|
||||
self.comb += FIFOWrapper(self.sink, self.source, _fifo)
|
||||
|
||||
class AsyncFIFO(Module):
|
||||
def __init__(self, layout, depth, cd_write="write", cd_read="read"):
|
||||
|
||||
self.sink = Sink(layout)
|
||||
self.source = Source(layout)
|
||||
self.busy = Signal()
|
||||
|
||||
_fifo = RenameClockDomains(fifo.AsyncFIFO(layout, depth),
|
||||
{"write": cd_write, "read": cd_read})
|
||||
self.submodules += _fifo
|
||||
|
||||
self.comb += FIFOWrapper(self.sink, self.source, _fifo)
|
||||
|
||||
class AsyncFIFO(_FIFOActor):
|
||||
def __init__(self, layout, depth):
|
||||
_FIFOActor.__init__(self, fifo.AsyncFIFO, layout, depth)
|
||||
|
|
Loading…
Reference in a new issue