Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #1017 from asadaleem-rs/master 

customize main ram size from command line argument
This commit is contained in:
enjoy-digital 2021-09-07 09:15:55 +02:00 committed by GitHub
parent e257d91d46 8428e89f09
commit 1598b5958d
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 2 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
litex/tools/litex_sim.py
View File

@ -325,7 +325,8 @@ def main():
if args.rom_init: if args.rom_init:
soc_kwargs["integrated_rom_init"] = get_mem_data(args.rom_init, cpu.endianness) soc_kwargs["integrated_rom_init"] = get_mem_data(args.rom_init, cpu.endianness)
if not args.with_sdram: if not args.with_sdram:
soc_kwargs["integrated_main_ram_size"] = 0x10000000 # 256 MB #configure main ram size from command line argument
soc_kwargs["integrated_main_ram_size"] = args.integrated_main_ram_size
if args.ram_init is not None: if args.ram_init is not None:
soc_kwargs["integrated_main_ram_init"] = get_mem_data(args.ram_init, cpu.endianness) soc_kwargs["integrated_main_ram_init"] = get_mem_data(args.ram_init, cpu.endianness)
else: else: