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use csr_data_width of 32 to speed up data mila upload

This commit is contained in:
Florent Kermarrec 2015-01-16 20:53:17 +01:00
parent 083bd54121
commit 175618bcb4
3 changed files with 3 additions and 3 deletions
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2
lib/sata/phy/__init__.py
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@ -1,5 +1,5 @@
from lib.sata.common import * from lib.sata.common import *
from lib.sata.phy.ctrl import SATAPHYHostCtrl, SATAPHYDeviceCtrl from lib.sata.phy.ctrl import SATAPHYHostCtrl
from lib.sata.phy.datapath import SATAPHYDatapath from lib.sata.phy.datapath import SATAPHYDatapath
class SATAPHY(Module): class SATAPHY(Module):

2
targets/bist.py
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@ -54,7 +54,7 @@ class _CRG(Module):
class GenSoC(Module): class GenSoC(Module):
csr_base = 0x00000000 csr_base = 0x00000000
csr_data_width = 8 csr_data_width = 32
csr_map = { csr_map = {
"uart2wb": 0, "uart2wb": 0,
"identifier": 2, "identifier": 2,

2
test/config.py
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@ -1,7 +1,7 @@
from miscope.host.uart2wishbone import Uart2Wishbone from miscope.host.uart2wishbone import Uart2Wishbone
csr_csv_file = "./csr.csv" csr_csv_file = "./csr.csv"
busword = 8 busword = 32
debug_wb = False debug_wb = False
com = 2 com = 2