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etherbone: fix addressing

This commit is contained in:
Florent Kermarrec 2015-02-16 23:37:08 +01:00
parent 67958f7448
commit 1a3183c15d
4 changed files with 5 additions and 5 deletions
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4
liteeth/core/etherbone/record.py
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@ -52,7 +52,7 @@ class LiteEthEtherboneRecordReceiver(Module):
source.eop.eq(counter.value == fifo.source.wcount-1), source.eop.eq(counter.value == fifo.source.wcount-1),
source.count.eq(fifo.source.wcount), source.count.eq(fifo.source.wcount),
source.be.eq(fifo.source.byte_enable), source.be.eq(fifo.source.byte_enable),
source.addr.eq(base_addr.q + counter.value), source.addr.eq(base_addr.q[2:] + counter.value),
source.we.eq(1), source.we.eq(1),
source.data.eq(fifo.source.data), source.data.eq(fifo.source.data),
fifo.source.ack.eq(source.ack), fifo.source.ack.eq(source.ack),
@ -80,7 +80,7 @@ class LiteEthEtherboneRecordReceiver(Module):
source.eop.eq(counter.value == fifo.source.rcount-1), source.eop.eq(counter.value == fifo.source.rcount-1),
source.count.eq(fifo.source.rcount), source.count.eq(fifo.source.rcount),
source.base_addr.eq(base_addr.q), source.base_addr.eq(base_addr.q),
source.addr.eq(fifo.source.data), source.addr.eq(fifo.source.data[2:]),
fifo.source.ack.eq(source.ack), fifo.source.ack.eq(source.ack),
If(source.stb & source.ack, If(source.stb & source.ack,
counter.ce.eq(1), counter.ce.eq(1),

2
liteeth/test/etherbone_tb.py
View File

@ -86,7 +86,7 @@ class TB(Module):
# test reads # test reads
if test_reads: if test_reads:
reads_addrs = [j for j in range(16)] reads_addrs = [0x1000 + 4*j for j in range(16)]
reads = etherbone.EtherboneReads(base_ret_addr=0x1000, addrs=reads_addrs) reads = etherbone.EtherboneReads(base_ret_addr=0x1000, addrs=reads_addrs)
record = etherbone.EtherboneRecord() record = etherbone.EtherboneRecord()
record.writes = None record.writes = None

0
liteeth/test/model/__init__.py Normal file
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4
test/test_etherbone.py
View File

@ -1,7 +1,7 @@
import socket, time import socket, time
from liteeth.test.model.etherbone import * from liteeth.test.model.etherbone import *
SRAM_BASE = 0x02000000//4 SRAM_BASE = 0x02000000
import socket import socket
sock = socket.socket(socket.AF_INET, socket.SOCK_DGRAM) sock = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
@ -36,7 +36,7 @@ sock.sendto(bytes(packet), ("192.168.1.40", 20000))
time.sleep(0.01) time.sleep(0.01)
# test reads # test reads
reads_addrs = [SRAM_BASE+j for j in range(16)] reads_addrs = [SRAM_BASE+4*j for j in range(16)]
reads = EtherboneReads(base_ret_addr=0x1000, addrs=reads_addrs) reads = EtherboneReads(base_ret_addr=0x1000, addrs=reads_addrs)
record = EtherboneRecord() record = EtherboneRecord()
record.writes = None record.writes = None