serv/cores: fix verilog top level (use serv_rf_top instead of serv_top), working :).

2020-04-26 21:05:47 +02:00 · 2020-04-26 21:05:47 +02:00 · 1f9db583fd
parent 2efd939d06
commit 1f9db583fd
1 changed files with 1 additions and 1 deletions
--- a/litex/soc/cores/cpu/serv/core.py
+++ b/litex/soc/cores/cpu/serv/core.py
@ -88,4 +88,4 @@ class SERV(CPU):

    def do_finalize(self):
        assert hasattr(self, "reset_address")
-        self.specials += Instance("serv_top", **self.cpu_params)
+        self.specials += Instance("serv_rf_top", **self.cpu_params)