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serv/cores: fix verilog top level (use serv_rf_top instead of serv_top), working :).

This commit is contained in:
Florent Kermarrec 2020-04-26 21:05:47 +02:00
parent 2efd939d06
commit 1f9db583fd
1 changed files with 1 additions and 1 deletions
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litex/soc/cores/cpu/serv/core.py
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@ -88,4 +88,4 @@ class SERV(CPU):
def do_finalize(self): def do_finalize(self):
assert hasattr(self, "reset_address") assert hasattr(self, "reset_address")
self.specials += Instance("serv_top", **self.cpu_params) self.specials += Instance("serv_rf_top", **self.cpu_params)