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lattice/common: cleanup instances, simplify tritates.

This commit is contained in:
Florent Kermarrec 2020-04-22 08:45:32 +02:00
parent 2d25bcb09c
commit 2031f28057
1 changed files with 40 additions and 74 deletions
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56
litex/build/lattice/common.py
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@ -99,27 +99,14 @@ lattice_ecp5_special_overrides = {
class LatticeECP5TrellisTristateImpl(Module):
def __init__(self, io, o, oe, i):
nbits, sign = value_bits_sign(io)
if nbits == 1:
self.specials += [
Instance("TRELLIS_IO",
p_DIR = "BIDIR",
i_B = io,
i_I = o,
o_O = i,
i_T = ~oe
)
]
else:
for bit in range(nbits):
self.specials += [
Instance("TRELLIS_IO",
self.specials += Instance("TRELLIS_IO",
p_DIR = "BIDIR",
i_B = io[bit],
i_I = o[bit],
o_O = i[bit],
i_B = io[bit] if nbits > 1 else io,
i_I = o[bit] if nbits > 1 else o,
o_O = i[bit] if nbits > 1 else i,
i_T = ~oe
)
]
class LatticeECP5TrellisTristate(Module):
@staticmethod
@ -165,28 +152,14 @@ class LatticeiCE40AsyncResetSynchronizer:
class LatticeiCE40TristateImpl(Module):
def __init__(self, io, o, oe, i):
nbits, sign = value_bits_sign(io)
if nbits == 1:
self.specials += [
Instance("SB_IO",
p_PIN_TYPE = C(0b101001, 6), # PIN_OUTPUT_TRISTATE + PIN_INPUT
io_PACKAGE_PIN = io,
i_OUTPUT_ENABLE = oe,
i_D_OUT_0 = o,
o_D_IN_0 = i
)
]
else:
for bit in range(nbits):
self.specials += [
Instance("SB_IO",
self.specials += Instance("SB_IO",
p_PIN_TYPE = C(0b101001, 6), # PIN_OUTPUT_TRISTATE + PIN_INPUT
io_PACKAGE_PIN = io[bit],
io_PACKAGE_PIN = io[bit] if nbits > 1 else io,
i_OUTPUT_ENABLE = oe,
i_D_OUT_0 = o[bit],
o_D_IN_0 = i[bit]
i_D_OUT_0 = o[bit] if nbits > 1 else o,
o_D_IN_0 = i[bit] if nbits > 1 else i,
)
]
class LatticeiCE40Tristate(Module):
@staticmethod
@ -203,9 +176,7 @@ class LatticeiCE40DifferentialOutputImpl(Module):
p_IO_STANDARD = "SB_LVCMOS",
io_PACKAGE_PIN = o_p,
i_D_OUT_0 = i
)
]
self.specials += [
),
Instance("SB_IO",
p_PIN_TYPE = C(0b011000, 6), # PIN_OUTPUT
p_IO_STANDARD = "SB_LVCMOS",
@ -214,7 +185,6 @@ class LatticeiCE40DifferentialOutputImpl(Module):
)
]
class LatticeiCE40DifferentialOutput:
@staticmethod
def lower(dr):
@ -224,8 +194,7 @@ class LatticeiCE40DifferentialOutput:
class LatticeiCE40DDROutputImpl(Module):
def __init__(self, i1, i2, o, clk):
self.specials += [
Instance("SB_IO",
self.specials += Instance("SB_IO",
p_PIN_TYPE = C(0b010000, 6), # PIN_OUTPUT_DDR
p_IO_STANDARD = "SB_LVCMOS",
io_PACKAGE_PIN = o,
@ -235,7 +204,6 @@ class LatticeiCE40DDROutputImpl(Module):
i_D_OUT_0 = i1,
i_D_OUT_1 = i2
)
]
class LatticeiCE40DDROutput:
@ -247,8 +215,7 @@ class LatticeiCE40DDROutput:
class LatticeiCE40DDRInputImpl(Module):
def __init__(self, i, o1, o2, clk):
self.specials += [
Instance("SB_IO",
self.specials += Instance("SB_IO",
p_PIN_TYPE = C(0b000000, 6), # PIN_INPUT_DDR
p_IO_STANDARD = "SB_LVCMOS",
io_PACKAGE_PIN = i,
@ -257,7 +224,6 @@ class LatticeiCE40DDRInputImpl(Module):
o_D_IN_0 = o1,
o_D_IN_1 = o2
)
]
class LatticeiCE40DDRInput: