soc/interconnect/stream: expose depth on SyncFIFO

2025-01-04 09:52:26 -05:00 · 2017-10-30 22:56:09 +01:00 · 2017-10-30 22:56:09 +01:00 · 2665a83288
commit 2665a83288
parent 876f3d2c8f
1 changed files with 1 additions and 0 deletions
--- a/litex/soc/interconnect/stream.py
+++ b/litex/soc/interconnect/stream.py
@ -99,6 +99,7 @@ class SyncFIFO(_FIFOWrapper):
            self,
            fifo.SyncFIFOBuffered if buffered else fifo.SyncFIFO,
            layout, depth)
+        self.depth = self.fifo.depth
        self.level = self.fifo.level