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fhdl: forbid zero-length signals

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Sebastien Bourdeauducq 2014-04-18 15:01:50 +02:00
parent 86f852a5f1
commit 29ed3918cc
1 changed files with 2 additions and 1 deletions
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3
migen/fhdl/structure.py
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@ -262,7 +262,8 @@ class Signal(Value):
self.nbits, self.signed = bits_sign self.nbits, self.signed = bits_sign
else: else:
self.nbits, self.signed = bits_sign, False self.nbits, self.signed = bits_sign, False
assert(isinstance(self.nbits, int)) if not isinstance(self.nbits, int) or self.nbits <= 0:
raise ValueError("Signal width must be a strictly positive integer")
self.variable = variable # deprecated self.variable = variable # deprecated
self.reset = reset self.reset = reset