soc/sdram: fix do_finalize
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@ -78,7 +78,7 @@ class SDRAMSoC(SoC):
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raise NotImplementedError("Unsupported SDRAM width of {} > 32".format(sdram_width))
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def do_finalize(self):
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if not self.integrated_ram_size:
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if not self.integrated_main_ram_size:
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if not self._sdram_phy_registered:
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raise FinalizeError("Need to call SDRAMSoC.register_sdram_phy()")
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SoC.do_finalize(self)
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