Merge pull request #1985 from VOGL-electronic/add_spi_master

soc.py: Add spi master and changes in litex_json2dts_zephyr.py for the spi drivers
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enjoy-digital 2024-06-13 09:01:48 +02:00 committed by GitHub
commit 2ddf9bb4e5
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2 changed files with 72 additions and 3 deletions

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@ -1965,6 +1965,27 @@ class LiteXSoC(SoC):
add_ip_address_constants(self, "REMOTEIP", ethmac_remote_ip) add_ip_address_constants(self, "REMOTEIP", ethmac_remote_ip)
add_mac_address_constants(self, "MACADDR", ethmac_address) add_mac_address_constants(self, "MACADDR", ethmac_address)
# Add SPI Master --------------------------------------------------------------------------------
def add_spi_master(self, name="spimaster", pads=None, data_width=8, spi_clk_freq=1e6, with_clk_divider=True, **kwargs):
# Imports.
from litex.soc.cores.spi import SPIMaster
self.check_if_exists(f"{name}")
if pads is None:
pads = self.platform.request(name)
spim = SPIMaster(pads, data_width, self.sys_clk_freq, spi_clk_freq, **kwargs)
if with_clk_divider:
spim.add_clk_divider()
self.add_module(name=f"{name}", module=spim)
self.add_constant(f"{name}_FREQUENCY", spi_clk_freq)
self.add_constant(f"{name}_DATA_WIDTH", data_width)
self.add_constant(f"{name}_MAX_CS", len(pads.cs_n))
# Add SPI Flash -------------------------------------------------------------------------------- # Add SPI Flash --------------------------------------------------------------------------------
def add_spi_flash(self, name="spiflash", mode="4x", clk_freq=20e6, module=None, phy=None, rate="1:1", software_debug=False, **kwargs): def add_spi_flash(self, name="spiflash", mode="4x", clk_freq=20e6, module=None, phy=None, rate="1:1", software_debug=False, **kwargs):
# Imports. # Imports.

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@ -181,6 +181,51 @@ def i2s_handler(name, parm, csr):
return dtsi return dtsi
def spimaster_handler(name, parm, csr):
registers = get_registers_of(name, csr)
if len(registers) == 0:
raise KeyError
dtsi = dts_reg(registers)
dtsi += dts_reg_names(registers)
dtsi += indent("clock-frequency = <{}>;\n".format(
csr['constants'][name + '_frequency']))
dtsi += indent("data-width = <{}>;\n".format(
csr['constants'][name + '_data_width']))
dtsi += indent("max-cs = <{}>;\n".format(
csr['constants'][name + '_max_cs']))
return dtsi
def spiflash_handler(name, parm, csr):
registers = get_registers_of(name, csr)
if len(registers) == 0:
raise KeyError
# Add memory mapped region for spiflash, the linker script in zephyr expects this region to be
# the entry with the name flash_mmap in the reg property of the spi controller.
try:
registers.append({
'addr': csr['memories'][name]['base'],
'size': csr['memories'][name]['size'],
'name': 'flash_mmap',
})
except KeyError as e:
print('memory mapped', e, 'not found')
dtsi = dts_reg(registers)
dtsi += dts_reg_names(registers)
dtsi += indent("clock-frequency = <{}>;\n".format(
csr['constants'][name + '_phy_frequency']))
return dtsi
def peripheral_handler(name, parm, csr): def peripheral_handler(name, parm, csr):
registers = get_registers_of(name, csr) registers = get_registers_of(name, csr)
if len(registers) == 0: if len(registers) == 0:
@ -219,10 +264,13 @@ overlay_handlers = {
'alias': 'eth0', 'alias': 'eth0',
'config_entry': 'ETH_LITEETH' 'config_entry': 'ETH_LITEETH'
}, },
'spiflash': { 'spimaster': {
'handler': peripheral_handler, 'handler': spimaster_handler,
'alias': 'spi0', 'alias': 'spi0',
'config_entry': 'SPI_LITESPI' },
'spiflash': {
'handler': spiflash_handler,
'alias': 'spi1',
}, },
'sdcard_block2mem': { 'sdcard_block2mem': {
'handler': peripheral_handler, 'handler': peripheral_handler,