framebuffer: video timing generator
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16c6e4f4a7
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309124711f
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@ -44,7 +44,7 @@ class _FrameInitiator(Actor):
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self._vscan = RegisterField("vscan", _vbits, reset=524)
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self._base = RegisterField("base", asmi_bits + self._alignment_bits)
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self._length = RegisterField("length", length_bits + self._alignment_bits)
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self._length = RegisterField("length", length_bits + self._alignment_bits, reset=640*480*4)
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layout = [
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("hres", BV(_hbits)),
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@ -102,7 +102,59 @@ class VTG(Actor):
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)
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def get_fragment(self):
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return Fragment() # TODO
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hactive = Signal()
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vactive = Signal()
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active = Signal()
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generate_en = Signal()
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hcounter = Signal(BV(_hbits))
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vcounter = Signal(BV(_vbits))
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hsync = Signal()
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vsync = Signal()
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comb = [
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active.eq(hactive & vactive),
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If(active,
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self.token("dac").r.eq(self.token("pixels").r[:_bpc_dac]),
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self.token("dac").g.eq(self.token("pixels").g[:_bpc_dac]),
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self.token("dac").b.eq(self.token("pixels").b[:_bpc_dac])
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),
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generate_en.eq(self.endpoints["timing"].stb & self.endpoints["dac"].ack \
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& (~active | self.endpoints["pixels"].stb)),
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self.endpoints["pixels"].ack.eq(self.endpoints["dac"].ack & active),
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self.endpoints["dac"].stb.eq(generate_en)
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]
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tp = self.token("timing")
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sync = [
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self.endpoints["timing"].ack.eq(0),
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If(generate_en,
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hcounter.eq(hcounter + 1),
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If(hcounter == 0, hactive.eq(1)),
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If(hcounter == tp.hres, hactive.eq(0)),
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If(hcounter == tp.hsync_start, hsync.eq(1)),
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If(hcounter == tp.hsync_end, hsync.eq(0)),
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If(hcounter == tp.hscan,
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hcounter.eq(0),
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If(vcounter == tp.vscan,
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vcounter.eq(0)
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).Else(
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vcounter.eq(vcounter + 1)
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)
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),
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If(vcounter == 0, vactive.eq(1)),
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If(vcounter == tp.vres, vactive.eq(0)),
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If(vcounter == tp.vsync_start, vsync.eq(1)),
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If(vcounter == tp.vsync_end,
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vsync.eq(0),
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self.endpoints["timing"].ack.eq(1)
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)
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)
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]
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return Fragment(comb, sync)
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class FIFO(Actor):
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def __init__(self):
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@ -153,7 +205,7 @@ class FIFO(Actor):
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class Framebuffer:
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def __init__(self, address, asmiport):
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asmi_bits = asmiport.hub.aw
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alignment_bits = asmiport.hub.dw//8
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alignment_bits = bits_for(asmiport.hub.dw//8)
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length_bits = _hbits + _vbits + 2 - alignment_bits
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pack_factor = asmiport.hub.dw//_bpp
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packed_pixels = structuring.pack_layout(_pixel_layout, pack_factor)
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