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Merge pull request #297 from mithro/mem-region-pp 

Improve the error message on memory region conflict.
This commit is contained in:
Tim Ansell 2019-10-30 20:49:27 -07:00 committed by GitHub
parent bb64f8a74d 4408dad9d2
commit 3465fc96d4
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2 changed files with 10 additions and 1 deletions
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5
litex/soc/integration/common.py
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@ -83,6 +83,11 @@ class SoCMemRegion:
self.length = length self.length = length
self.type = type self.type = type
def __str__(self):
return "<SoCMemRegion 0x{:x} 0x{:x} {}>".format(
self.origin, self.length, self.type)
class SoCCSRRegion: class SoCCSRRegion:
def __init__(self, origin, busword, obj): def __init__(self, origin, busword, obj):
self.origin = origin self.origin = origin

6
litex/soc/integration/soc_core.py
View File

@ -401,7 +401,11 @@ class SoCCore(Module):
self.mem_regions[name] = SoCMemRegion(origin, length, type) self.mem_regions[name] = SoCMemRegion(origin, length, type)
overlap = self.check_regions_overlap(self.mem_regions) overlap = self.check_regions_overlap(self.mem_regions)
if overlap is not None: if overlap is not None:
raise ValueError("Memory region conflict between {} and {}".format(overlap[0], overlap[1])) o0, o1 = overlap[0], overlap[1]
raise ValueError("Memory region conflict between {} ({}) and {} ({})".format(
o0, self.mem_regions[o0],
o1, self.mem_regions[o1],
))
def register_mem(self, name, address, interface, size=0x10000000): def register_mem(self, name, address, interface, size=0x10000000):
self.add_wb_slave(address, interface, size) self.add_wb_slave(address, interface, size)